1. Field of the Invention
The present invention generally relates to testing and diagnosis of failures in integrated circuits. More specifically, a clocking signal in a Built-In Self Test (BIST) sequence is interrupted to permit a second clocking cycle to repeatedly recycle through a particular section of the BIST. In an exemplary embodiment, activity in the circuit is determined by detecting photons emitted during this second clocking cycle.
2. Description of the Related Art
The rapid densification of VLSI (Very Large Scale Integrated) circuit devices, associated with high speed circuit performance, and relatively short time-to-market, has driven the need to rapidly characterize and diagnose complex designs early in the product cycle.
Concurrently, conventional characterization test tools and diagnostic techniques, already somewhat limited, are quickly becoming obsolete. These problems in turn show the need for a novel test and diagnostic methodology that combines new Physical Failure Analysis (PFA) tools with integrated test and diagnostics support built-in the semiconductor device. Some of the built-in test and diagnostic functions may be based on several Design for Test (DFT) techniques such as Level Sensitive Scan Design (LSSD), Logic Built-In-Self-Test (LBIST), Array Built-In-Self-Test (ABIST), On-product-clock-generation (OPCG), and others.
Thus, a need exists so that testing tools and diagnostic methods keep pace with the newer techniques of semiconductor design and fabrication.